[PATCH] D123264: [RISCV] Pre-RA expand pseudos pass

[Hsiangkai Wang via Phabricator via llvm-commits]

HsiangKai added inline comments.


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Comment at: llvm/include/llvm/CodeGen/MachineInstr.h:1212
+    return isLabel() || isCFIInstruction() || getPreInstrSymbol() ||
+           getPostInstrSymbol();
+  }
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luismarques wrote:
> HsiangKai wrote:
> > Is it enough to only add checking of getPreInstrSymbol()?
> What do you mean, enough for what? (This patch also checks `getPostInstrSymbol()`).
> In my testing that was enough to ensure that the label always pointed to the correct upper instruction, but feedback about this is welcome.
Just curious why checking getPostInstrSymbol() here. There is no setPostInstrSymbol() in this patch.


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Comment at: llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp:101
   switch (MBBI->getOpcode()) {
   case RISCV::PseudoLLA:
     return expandLoadLocalAddress(MBB, MBBI, NextMBBI);
----------------
Do we still need to handle PseudoLLA in RISCVExpandPseudo?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123264/new/

https://reviews.llvm.org/D123264