[PATCH] D123839: [RISCV][NFC] Use defvar to simplify pattern definations.

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 15 01:02:01 PDT 2022


jacquesguan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:707
+      (!cast<Instruction>(instruction_name#"_WX_"#vti.LMul.MX)
+        wti.RegClass:$rs2, GPR:$rs1,
+        vti.AVL, vti.Log2SEW)>;
----------------
Can these two lines be merged into one line if is less than 80 cols?


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:829
+              (wti.Vector (extop (vti.Vector (SplatPat GPR:$rs1)),
+                                     (vti.Mask true_mask), VLOpFrag)),
+          (wti.Mask true_mask), VLOpFrag),
----------------
Should adjust the align here.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123839/new/

https://reviews.llvm.org/D123839



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