[PATCH] D92105: [RISCV] Add pre-emit pass to make more instructions compressible

[Alex Bradbury via Phabricator via llvm-commits]

asb added a comment.

@craigblackmore: could you please take a look at compiling complex-2.c from the GCC torture suite with this patch. I'm getting incorrect output for RV32IMAFDC at Oz with this patch:

./output_rv32imafdc_ilp32_Oz/complex-2.s:16:7: error: invalid operand for instruction

  addi    fa0, ft0, 0
          ^

./output_rv32imafdc_ilp32_Oz/complex-2.s:18:7: error: invalid operand for instruction

  addi    fa1, ft1, 0
          ^


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  https://reviews.llvm.org/D92105/new/

https://reviews.llvm.org/D92105