[PATCH] D123699: [AMDGPU] Remove redundand RequiredAlignment assignment. NFCI.

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 14 02:04:09 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG49b39c4f2e4b: [AMDGPU] Remove redundand RequiredAlignment assignment. NFCI. (authored by rampitec).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123699/new/

https://reviews.llvm.org/D123699

Files:
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp


Index: llvm/lib/Target/AMDGPU/SIISelLowering.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -1552,7 +1552,6 @@
 
       // 12 byte accessing via ds_read/write_b96 require 16-byte alignment on
       // gfx8 and older.
-      RequiredAlignment = Align(16);
 
       if (Subtarget->hasUnalignedDSAccessEnabled()) {
         // Naturally aligned access is fastest. However, also report it is Fast


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D123699.422776.patch
Type: text/x-patch
Size: 514 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220414/d2569eec/attachment.bin>


More information about the llvm-commits mailing list