[llvm] 681b946 - RegAllocGreedy: Remove redundant check for virtual registers

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2022-04-13T15:00:18-04:00
New Revision: 681b9466c9209ee6c7209761a309fb78c6fa1ef6

URL: https://github.com/llvm/llvm-project/commit/681b9466c9209ee6c7209761a309fb78c6fa1ef6
DIFF: https://github.com/llvm/llvm-project/commit/681b9466c9209ee6c7209761a309fb78c6fa1ef6.diff

LOG: RegAllocGreedy: Remove redundant check for virtual registers

The set of interfering virtual registers obviously only includes
virtual registers.

Added: 
    

Modified: 
    llvm/lib/CodeGen/RegAllocGreedy.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 80d796d1ad924..029f05d0b5072 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -460,9 +460,6 @@ bool RAGreedy::canEvictInterferenceInRange(const LiveInterval &VirtReg,
       if (!Intf->overlaps(Start, End))
         continue;
 
-      // Cannot evict non virtual reg interference.
-      if (!Register::isVirtualRegister(Intf->reg()))
-        return false;
       // Never evict spill products. They cannot split or spill.
       if (ExtraInfo->getStage(*Intf) == RS_Done)
         return false;