[llvm] fcade8e - [X86][test] Add encoding/decoding tests for VEX instruction w/ address-size prefix

[Shengchen Kan via llvm-commits]

Author: Shengchen Kan
Date: 2022-04-13T12:50:25+08:00
New Revision: fcade8e91eaeb682c7b882bfd56836b66cd91960

URL: https://github.com/llvm/llvm-project/commit/fcade8e91eaeb682c7b882bfd56836b66cd91960
DIFF: https://github.com/llvm/llvm-project/commit/fcade8e91eaeb682c7b882bfd56836b66cd91960.diff

LOG: [X86][test] Add encoding/decoding tests for VEX instruction w/ address-size prefix

This patch also contains a regression test for D122448

Reviewed By: hvdijk, RKSimon

Differential Revision: https://reviews.llvm.org/D122449

Added: 
    

Modified: 
    llvm/test/MC/Disassembler/X86/x86-64-avx.txt
    llvm/test/MC/X86/x86_64-avx-encoding.s

Removed: 
    


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diff  --git a/llvm/test/MC/Disassembler/X86/x86-64-avx.txt b/llvm/test/MC/Disassembler/X86/x86-64-avx.txt
index 7062c6816c16f..c0ca4cd715314 100644
--- a/llvm/test/MC/Disassembler/X86/x86-64-avx.txt
+++ b/llvm/test/MC/Disassembler/X86/x86-64-avx.txt
@@ -35,3 +35,6 @@
 
 # CHECK: vphsubd %xmm3, %xmm2, %xmm11
 0xc4 0x62 0xe9 0x06 0xdb
+
+# CHECK: vpsubq (%esp), %xmm1, %xmm2
+0x67 0xc5 0xf1 0xfb 0x14 0x24

diff  --git a/llvm/test/MC/X86/x86_64-avx-encoding.s b/llvm/test/MC/X86/x86_64-avx-encoding.s
index e0e0aabf64c5f..50e5fae9f94b0 100644
--- a/llvm/test/MC/X86/x86_64-avx-encoding.s
+++ b/llvm/test/MC/X86/x86_64-avx-encoding.s
@@ -1696,6 +1696,10 @@ vdivpd  -4(%rcx,%rbx,8), %xmm10, %xmm11
 // CHECK: encoding: [0xc5,0x19,0xfb,0x28]
           vpsubq  (%rax), %xmm12, %xmm13
 
+// CHECK: vpsubq  (%esp), %xmm1, %xmm2
+// CHECK: encoding: [0x67,0xc5,0xf1,0xfb,0x14,0x24]
+          vpsubq  (%esp), %xmm1, %xmm2
+
 // CHECK: vpsubsb  %xmm11, %xmm12, %xmm13
 // CHECK: encoding: [0xc4,0x41,0x19,0xe8,0xeb]
           vpsubsb  %xmm11, %xmm12, %xmm13