[PATCH] D122635: [RISCV] Filter out instructions which contain unsafe things when outlining

Tue Apr 12 20:34:25 PDT 2022

pcwang-thead added a comment.

In D122635#3441085 <https://reviews.llvm.org/D122635#3441085>, @luismarques wrote:

> In D122635#3438400 <https://reviews.llvm.org/D122635#3438400>, @pcwang-thead wrote:
>
>> I am sorry I haven't found any related tests in other targets and it is really hard to construct one...
>
> You might want to go for a MIR test. Let me know if you need help writing one.

Thanks!

I have written several MIR tests but found that we don't need to filter out these cases.

- For `MO.isCFIIndex()`, we have handled CFIs before, so there is no need to do it again.
- For `MO.isFI()`, because `Machine Outliner` runs after `Prologue/Epilogue Insertion & Frame Finalization`, so there is no FrameIndex any more(If I understand correctly).
- For `MO.isTargetIndex()`, RISCV has no implemented target index, so it is unnecessary. ARM/AArch64/X86 have no target index too, which is weird.

I don't know why other targets exclude these operand types, but I may abandon this patch if it is actually meaningless.

Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D122635