[llvm] 788f94f - AMDGPU: Don't use unreachable on stores to unhandled address space

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 14:32:00 PDT 2022


Author: Matt Arsenault
Date: 2022-04-12T17:31:50-04:00
New Revision: 788f94f731dc9ba514925ed0c5936c5e79f6abd8

URL: https://github.com/llvm/llvm-project/commit/788f94f731dc9ba514925ed0c5936c5e79f6abd8
DIFF: https://github.com/llvm/llvm-project/commit/788f94f731dc9ba514925ed0c5936c5e79f6abd8.diff

LOG: AMDGPU: Don't use unreachable on stores to unhandled address space

For stores to constant address space, this will now consistently hit a
selection error instead of hitting unreachable in an asserts build.

I'm not sure what we should really do here. We could either just
codegen as if it were global, delete the instruction, or declare the
IR invalid (we really should have a target IR verifier to enforce it).

Added: 
    llvm/test/CodeGen/AMDGPU/store-to-constant-error.ll

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 7fb0eb2d437ad..56238f2a149e9 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -9047,9 +9047,10 @@ SDValue SITargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
       return SplitVectorStore(Op, DAG);
 
     return expandUnalignedStore(Store, DAG);
-  } else {
-    llvm_unreachable("unhandled address space");
   }
+
+  // Probably an invalid store. If so we'll end up emitting a selection error.
+  return SDValue();
 }
 
 SDValue SITargetLowering::LowerTrig(SDValue Op, SelectionDAG &DAG) const {

diff  --git a/llvm/test/CodeGen/AMDGPU/store-to-constant-error.ll b/llvm/test/CodeGen/AMDGPU/store-to-constant-error.ll
new file mode 100644
index 0000000000000..80758b2de3a1c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/store-to-constant-error.ll
@@ -0,0 +1,10 @@
+; RUN: not --crash llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o /dev/null %s 2>&1 | FileCheck -check-prefix=SDAG %s
+; RUN: not --crash llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -o /dev/null %s 2>&1 | FileCheck -check-prefix=GISEL %s
+
+; SDAG: LLVM ERROR: Cannot select: t{{[0-9]+}}: ch = store<(store (s32) into %ir.ptr.load, addrspace 4)>
+; GISEL: LLVM ERROR: cannot select: G_STORE %{{[0-9]+}}:vgpr(s32), %{{[0-9]+}}:vgpr(p4) :: (store (s32) into %ir.ptr.load, addrspace 4) (in function: store_to_constant_i32)
+define amdgpu_kernel void @store_to_constant_i32(i32 addrspace(4)* %ptr) {
+bb:
+  store i32 1, i32 addrspace(4)* %ptr, align 4
+  ret void
+}


        


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