[PATCH] D118026: [RISCV] Improve the condition of hasRVVFrameObject.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 10:22:13 PDT 2022


craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:965
+
+  // If there is scalable vector, there must be RVV frame object.
+  const MachineFrameInfo &MFI = MF.getFrameInfo();
----------------
This sentence doesn't make sense. Isn't this checking for the existence of an RVV frame object directly?


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:978
+          auto Reg = MO.getReg();
+          if (Reg == RISCV::VTYPE || RISCV::VRRegClass.contains(Reg) ||
+              RISCV::VRM2RegClass.contains(Reg) ||
----------------
Does RISCV::VRRegClass.contains work for virtual registers?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D118026/new/

https://reviews.llvm.org/D118026



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