[PATCH] D123355: [RISCV][NFC] Refactor patterns for Multiply Add instructions

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 10:03:34 PDT 2022


frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td:1068
-            (!cast<Instruction>("PseudoVWMACC_VV_" # vti.LMul.MX)
-                 wti.RegClass:$rd, vti.RegClass:$rs1, vti.RegClass:$rs2,
-                 GPR:$vl, vti.Log2SEW, TAIL_AGNOSTIC)>;
----------------
craig.topper wrote:
> frasercrmck wrote:
> > We're losing the `wti` in `wti.RegClass:$rd, vti.RegClass:$rs1` here by moving to `VPatWidenMultiplyAddVL_VV_VX`. I'm not sure why this isn't an error.
> Doesn't VPatWidenMultiplyAddVL_VV_VX also use `wti.RegClass:$rd, vti.RegClass:$rs1`?
Oh dear, yes of course. I think I was looking at `VPatMultiplyAddVL_VV_VX` by mistake.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123355/new/

https://reviews.llvm.org/D123355



More information about the llvm-commits mailing list