[llvm] 528aa09 - [AMDGPU][Codegen] Unsupported image sample texture map instructions

Anshil Gandhi via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 12 09:39:13 PDT 2022


Author: Anshil Gandhi
Date: 2022-04-12T10:38:59-06:00
New Revision: 528aa090104a2d390ea47dabc100801abca150a3

URL: https://github.com/llvm/llvm-project/commit/528aa090104a2d390ea47dabc100801abca150a3
DIFF: https://github.com/llvm/llvm-project/commit/528aa090104a2d390ea47dabc100801abca150a3.diff

LOG: [AMDGPU][Codegen] Unsupported image sample texture map instructions

Disables image_sample_*_g16 instructions on architectures lacking g16 support. This patch fixes the issue 54672.

Differential Revision: https://reviews.llvm.org/D123461

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/MIMGInstructions.td
    llvm/test/MC/AMDGPU/gfx7_unsupported.s
    llvm/test/MC/AMDGPU/gfx8_unsupported.s
    llvm/test/MC/AMDGPU/gfx9_unsupported.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/MIMGInstructions.td b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
index 1d7a3a52e4d59..9427355a1fbc8 100644
--- a/llvm/lib/Target/AMDGPU/MIMGInstructions.td
+++ b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
@@ -1000,8 +1000,6 @@ let OtherPredicates = [HasExtendedImageInsts] in {
 defm IMAGE_SAMPLE_CL            : MIMG_Sampler_WQM <mimgopc<0x21>, AMDGPUSample_cl>;
 defm IMAGE_SAMPLE_D             : MIMG_Sampler <mimgopc<0x22>, AMDGPUSample_d>;
 defm IMAGE_SAMPLE_D_CL          : MIMG_Sampler <mimgopc<0x23>, AMDGPUSample_d_cl>;
-defm IMAGE_SAMPLE_D_G16         : MIMG_Sampler <mimgopc<0xa2>, AMDGPUSample_d, 0, 1>;
-defm IMAGE_SAMPLE_D_CL_G16      : MIMG_Sampler <mimgopc<0xa3>, AMDGPUSample_d_cl, 0, 1>;
 defm IMAGE_SAMPLE_L             : MIMG_Sampler <mimgopc<0x24>, AMDGPUSample_l>;
 defm IMAGE_SAMPLE_B             : MIMG_Sampler_WQM <mimgopc<0x25>, AMDGPUSample_b>;
 defm IMAGE_SAMPLE_B_CL          : MIMG_Sampler_WQM <mimgopc<0x26>, AMDGPUSample_b_cl>;
@@ -1010,8 +1008,6 @@ defm IMAGE_SAMPLE_C             : MIMG_Sampler_WQM <mimgopc<0x28>, AMDGPUSample_
 defm IMAGE_SAMPLE_C_CL          : MIMG_Sampler_WQM <mimgopc<0x29>, AMDGPUSample_c_cl>;
 defm IMAGE_SAMPLE_C_D           : MIMG_Sampler <mimgopc<0x2a>, AMDGPUSample_c_d>;
 defm IMAGE_SAMPLE_C_D_CL        : MIMG_Sampler <mimgopc<0x2b>, AMDGPUSample_c_d_cl>;
-defm IMAGE_SAMPLE_C_D_G16       : MIMG_Sampler <mimgopc<0xaa>, AMDGPUSample_c_d, 0, 1>;
-defm IMAGE_SAMPLE_C_D_CL_G16    : MIMG_Sampler <mimgopc<0xab>, AMDGPUSample_c_d_cl, 0, 1>;
 defm IMAGE_SAMPLE_C_L           : MIMG_Sampler <mimgopc<0x2c>, AMDGPUSample_c_l>;
 defm IMAGE_SAMPLE_C_B           : MIMG_Sampler_WQM <mimgopc<0x2d>, AMDGPUSample_c_b>;
 defm IMAGE_SAMPLE_C_B_CL        : MIMG_Sampler_WQM <mimgopc<0x2e>, AMDGPUSample_c_b_cl>;
@@ -1020,8 +1016,6 @@ defm IMAGE_SAMPLE_O             : MIMG_Sampler_WQM <mimgopc<0x30>, AMDGPUSample_
 defm IMAGE_SAMPLE_CL_O          : MIMG_Sampler_WQM <mimgopc<0x31>, AMDGPUSample_cl_o>;
 defm IMAGE_SAMPLE_D_O           : MIMG_Sampler <mimgopc<0x32>, AMDGPUSample_d_o>;
 defm IMAGE_SAMPLE_D_CL_O        : MIMG_Sampler <mimgopc<0x33>, AMDGPUSample_d_cl_o>;
-defm IMAGE_SAMPLE_D_O_G16       : MIMG_Sampler <mimgopc<0xb2>, AMDGPUSample_d_o, 0, 1>;
-defm IMAGE_SAMPLE_D_CL_O_G16    : MIMG_Sampler <mimgopc<0xb3>, AMDGPUSample_d_cl_o, 0, 1>;
 defm IMAGE_SAMPLE_L_O           : MIMG_Sampler <mimgopc<0x34>, AMDGPUSample_l_o>;
 defm IMAGE_SAMPLE_B_O           : MIMG_Sampler_WQM <mimgopc<0x35>, AMDGPUSample_b_o>;
 defm IMAGE_SAMPLE_B_CL_O        : MIMG_Sampler_WQM <mimgopc<0x36>, AMDGPUSample_b_cl_o>;
@@ -1030,8 +1024,6 @@ defm IMAGE_SAMPLE_C_O           : MIMG_Sampler_WQM <mimgopc<0x38>, AMDGPUSample_
 defm IMAGE_SAMPLE_C_CL_O        : MIMG_Sampler_WQM <mimgopc<0x39>, AMDGPUSample_c_cl_o>;
 defm IMAGE_SAMPLE_C_D_O         : MIMG_Sampler <mimgopc<0x3a>, AMDGPUSample_c_d_o>;
 defm IMAGE_SAMPLE_C_D_CL_O      : MIMG_Sampler <mimgopc<0x3b>, AMDGPUSample_c_d_cl_o>;
-defm IMAGE_SAMPLE_C_D_O_G16     : MIMG_Sampler <mimgopc<0xba>, AMDGPUSample_c_d_o, 0, 1>;
-defm IMAGE_SAMPLE_C_D_CL_O_G16  : MIMG_Sampler <mimgopc<0xbb>, AMDGPUSample_c_d_cl_o, 0, 1>;
 defm IMAGE_SAMPLE_C_L_O         : MIMG_Sampler <mimgopc<0x3c>, AMDGPUSample_c_l_o>;
 defm IMAGE_SAMPLE_C_B_CL_O      : MIMG_Sampler_WQM <mimgopc<0x3e>, AMDGPUSample_c_b_cl_o>;
 defm IMAGE_SAMPLE_C_B_O         : MIMG_Sampler_WQM <mimgopc<0x3d>, AMDGPUSample_c_b_o>;
@@ -1072,6 +1064,17 @@ defm IMAGE_SAMPLE_CD_O          : MIMG_Sampler <mimgopc<0x6c>, AMDGPUSample_cd_o
 defm IMAGE_SAMPLE_CD_CL_O       : MIMG_Sampler <mimgopc<0x6d>, AMDGPUSample_cd_cl_o>;
 defm IMAGE_SAMPLE_C_CD_O        : MIMG_Sampler <mimgopc<0x6e>, AMDGPUSample_c_cd_o>;
 defm IMAGE_SAMPLE_C_CD_CL_O     : MIMG_Sampler <mimgopc<0x6f>, AMDGPUSample_c_cd_cl_o>;
+} // End OtherPredicates = [HasExtendedImageInsts]
+
+let OtherPredicates = [HasExtendedImageInsts,HasG16] in {
+defm IMAGE_SAMPLE_D_G16         : MIMG_Sampler <mimgopc<0xa2>, AMDGPUSample_d, 0, 1>;
+defm IMAGE_SAMPLE_D_CL_G16      : MIMG_Sampler <mimgopc<0xa3>, AMDGPUSample_d_cl, 0, 1>;
+defm IMAGE_SAMPLE_C_D_G16       : MIMG_Sampler <mimgopc<0xaa>, AMDGPUSample_c_d, 0, 1>;
+defm IMAGE_SAMPLE_C_D_CL_G16    : MIMG_Sampler <mimgopc<0xab>, AMDGPUSample_c_d_cl, 0, 1>;
+defm IMAGE_SAMPLE_D_O_G16       : MIMG_Sampler <mimgopc<0xb2>, AMDGPUSample_d_o, 0, 1>;
+defm IMAGE_SAMPLE_D_CL_O_G16    : MIMG_Sampler <mimgopc<0xb3>, AMDGPUSample_d_cl_o, 0, 1>;
+defm IMAGE_SAMPLE_C_D_O_G16     : MIMG_Sampler <mimgopc<0xba>, AMDGPUSample_c_d_o, 0, 1>;
+defm IMAGE_SAMPLE_C_D_CL_O_G16  : MIMG_Sampler <mimgopc<0xbb>, AMDGPUSample_c_d_cl_o, 0, 1>;
 defm IMAGE_SAMPLE_CD_G16        : MIMG_Sampler <mimgopc<0xe8>, AMDGPUSample_cd, 0, 1>;
 defm IMAGE_SAMPLE_CD_CL_G16     : MIMG_Sampler <mimgopc<0xe9>, AMDGPUSample_cd_cl, 0, 1>;
 defm IMAGE_SAMPLE_C_CD_G16      : MIMG_Sampler <mimgopc<0xea>, AMDGPUSample_c_cd, 0, 1>;
@@ -1080,7 +1083,8 @@ defm IMAGE_SAMPLE_CD_O_G16      : MIMG_Sampler <mimgopc<0xec>, AMDGPUSample_cd_o
 defm IMAGE_SAMPLE_CD_CL_O_G16   : MIMG_Sampler <mimgopc<0xed>, AMDGPUSample_cd_cl_o, 0, 1>;
 defm IMAGE_SAMPLE_C_CD_O_G16    : MIMG_Sampler <mimgopc<0xee>, AMDGPUSample_c_cd_o, 0, 1>;
 defm IMAGE_SAMPLE_C_CD_CL_O_G16 : MIMG_Sampler <mimgopc<0xef>, AMDGPUSample_c_cd_cl_o, 0, 1>;
-} // End OtherPredicates = [HasExtendedImageInsts]
+} // End OtherPredicates = [HasExtendedImageInsts,HasG16]
+
 //def IMAGE_RSRC256 : MIMG_NoPattern_RSRC256 <"image_rsrc256", 0x0000007e>;
 //def IMAGE_SAMPLER : MIMG_NoPattern_ <"image_sampler", 0x0000007f>;
 

diff  --git a/llvm/test/MC/AMDGPU/gfx7_unsupported.s b/llvm/test/MC/AMDGPU/gfx7_unsupported.s
index 81146340ad729..e295f4ff21740 100644
--- a/llvm/test/MC/AMDGPU/gfx7_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx7_unsupported.s
@@ -2546,6 +2546,54 @@ v_xor3_b32 v255, v1, v2, v3
 // Unsupported e64 variants.
 //===----------------------------------------------------------------------===//
 
+image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
 v_interp_mov_f32_e64 v255, p10, attr0.x
 // CHECK: error: e64 variant of this instruction is not supported
 

diff  --git a/llvm/test/MC/AMDGPU/gfx8_unsupported.s b/llvm/test/MC/AMDGPU/gfx8_unsupported.s
index 47f0f35c4d841..ede155d882280 100644
--- a/llvm/test/MC/AMDGPU/gfx8_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx8_unsupported.s
@@ -4,6 +4,54 @@
 // Unsupported instructions.
 //===----------------------------------------------------------------------===//
 
+image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
 buffer_atomic_add_f32 v255, off, s[8:11], s3 offset:4095
 // CHECK: error: instruction not supported on this GPU
 

diff  --git a/llvm/test/MC/AMDGPU/gfx9_unsupported.s b/llvm/test/MC/AMDGPU/gfx9_unsupported.s
index cf1b2b90c8c5e..f085b7bc46d24 100644
--- a/llvm/test/MC/AMDGPU/gfx9_unsupported.s
+++ b/llvm/test/MC/AMDGPU/gfx9_unsupported.s
@@ -4,6 +4,54 @@
 // Unsupported instructions.
 //===----------------------------------------------------------------------===//
 
+image_sample_c_cd_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_cd_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_cl_o_g16 v[5:6], v[1:6], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_c_d_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_cd_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_cl_o_g16 v[5:6], v[1:5], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_g16 v[5:6], v[1:3], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
+image_sample_d_o_g16 v[5:6], v[1:4], s[8:15], s[12:15] dmask:0x3
+// CHECK: error: instruction not supported on this GPU
+
 buffer_atomic_add_f32 v255, off, s[8:11], s3 offset:4095
 // CHECK: error: instruction not supported on this GPU
 


        


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