[PATCH] D123581: [RISCV] Teach vsetvli insertion to handle VSETVLIInfo of vl-modified instruction.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Would it simplify things if the VLEFF pseudo instruction had the GPR output and the vector register output. And we expanded it PseudoReadVL after register allocation?


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https://reviews.llvm.org/D123581