[PATCH] D123606: test: Don't depend on behavior of switch lower in one test. NFC

[Ruiling, Song via Phabricator via llvm-commits]

ruiling created this revision.
ruiling added reviewers: arsenm, foad, nhaehnle.
Herald added subscribers: kerbowa, jvesely.
Herald added a project: All.
ruiling requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.

This is a preliminary change to update the test so that it does not
depend on how switch-case will be lowered. The following change will
lower switch-case more optimally that will make the test no longer
valid.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123606

Files:
  llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll


Index: llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
+++ llvm/test/CodeGen/AMDGPU/ipra-return-address-save-restore.ll
@@ -47,11 +47,20 @@
   br i1 %phi.cmp, label %common.ret, label %cond.true20
 
 cond.true20:                                      ; preds = %cond.true
-  %trunc1 = trunc i32 %0 to i8
-  switch i8 %trunc, label %common.ret [
-    i8 44, label %sw.bb
-    i8 0, label %if.end.i.i2285
-  ]
+  %v = zext i8 %trunc to i32
+  br label %NodeBlock
+
+NodeBlock:                                        ; preds = %cond.true20
+  %Pivot = icmp slt i32 %v, 44
+  br i1 %Pivot, label %LeafBlock, label %LeafBlock1
+
+LeafBlock1:                                       ; preds = %NodeBlock
+  %SwitchLeaf2 = icmp eq i32 %v, 44
+  br i1 %SwitchLeaf2, label %sw.bb, label %NewDefault
+
+LeafBlock:                                        ; preds = %NodeBlock
+  %SwitchLeaf = icmp eq i32 %v, 0
+  br i1 %SwitchLeaf, label %if.end.i.i2285, label %NewDefault
 
 sw.bb:                                            ; preds = %cond.true20
   %10 = load float, float* null, align 4
@@ -76,7 +85,12 @@
   store i32 0, i32* null, align 4
   br label %common.ret
 
-common.ret:                                       ; preds = %if.end.i.i2285, %if.end627.sink.split, %cond.end579, %bsdf_alloc.exit2188, %if.end511, %common.ret.critedge, %if.then443, %sw.bb, %cond.true20, %cond.true
+NewDefault:                                       ; preds = %LeafBlock1, %LeafBlock
+  %phi.store = phi i32 [0, %LeafBlock], [1, %LeafBlock1]
+  store i32 %phi.store, i32* null, align 4
+  br label %common.ret
+
+common.ret:                                       ; preds = %if.end.i.i2285, %if.end627.sink.split, %cond.end579, %bsdf_alloc.exit2188, %if.end511, %common.ret.critedge, %if.then443, %sw.bb, %NewDefault, %cond.true
   ret void
 
 if.end511:                                        ; preds = %if.then443


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