[PATCH] D123525: [AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.

Mon Apr 11 19:49:59 PDT 2022

hsmhsm added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:521
+        (HighestAvailableVGPR < 16)
+            ? AMDGPU::VGPR_32RegClass.getRegister(32)
+            : AMDGPU::VGPR_32RegClass.getRegister(HighestAvailableVGPR);
----------------
hsmhsm wrote:
> rampitec wrote:
> > And then 32 is over the budget. This is a bug.
> Really, I have no idea what to do in case of constrained register budget - Stealing one more register from already constrained set would make RegAlloc to fail because of "no register".
> 
> However, I think, we need to discuss it, and refine it based on common consensus.
Also note that the bug that you noticed is not a new one from this patch, it is already there in the code since https://reviews.llvm.org/D118415 landed. Indeed, we should fix this bug now.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123525/new/

https://reviews.llvm.org/D123525