[PATCH] D123525: [AMDGPU] On gfx908, reserve VGPR for AGPR copy based on register budget.

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec requested changes to this revision.
rampitec added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:628
   // or spill with the slot.
   while (RegNo-- && RS.FindUnusedReg(&AMDGPU::VGPR_32RegClass)) {
     Register Tmp2 = RS.scavengeRegister(&AMDGPU::VGPR_32RegClass, 0);
----------------
It will never get replaced if RegNo == 0.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:520
+    VGPRForAGPRCopy =
+        (HighestAvailableVGPR < 16)
+            ? AMDGPU::VGPR_32RegClass.getRegister(32)
----------------
I do not know real world situation with such low budget.


================
Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h:521
+        (HighestAvailableVGPR < 16)
+            ? AMDGPU::VGPR_32RegClass.getRegister(32)
+            : AMDGPU::VGPR_32RegClass.getRegister(HighestAvailableVGPR);
----------------
And then 32 is over the budget. This is a bug.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123525/new/

https://reviews.llvm.org/D123525