[PATCH] D123181: [RISCV] Refactoring the type promotion process of instructions fsl/fsr

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6591
+  // Walk through the operand list.
+  for (unsigned I = 1; I < N->getNumOperands(); I++)
+    // Promote the operand to i64 type
----------------
Nit: you could replace this with `for (SDValue Op : N->ops())`


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123181/new/

https://reviews.llvm.org/D123181