[PATCH] D123512: [MachineCombiner]: Avoid including transient instructions in latency calculation
    Florian Hahn via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Apr 11 07:54:58 PDT 2022
    
    
  
fhahn added inline comments.
================
Comment at: llvm/test/CodeGen/AArch64/neon-mla-mls.ll:141
 ; CHECK:       // %bb.0:
-; CHECK-NEXT:    mul v0.8b, v0.8b, v1.8b
-; CHECK-NEXT:    sub v0.8b, v0.8b, v2.8b
+; CHECK-NEXT:    neg v2.8b, v2.8b
+; CHECK-NEXT:    mla v2.8b, v0.8b, v1.8b
----------------
Is this actually profitable compared to the original code? Shouldn't this use `mls`?
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123512/new/
https://reviews.llvm.org/D123512
    
    
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