[PATCH] D123496: Add Stackmap support for RISC-V

Sacha Coppey via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Apr 11 07:26:17 PDT 2022


Zeavee updated this revision to Diff 421920.
Zeavee added a comment.

Adds a missing 0 IMM in a JALR instruction.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123496/new/

https://reviews.llvm.org/D123496

Files:
  llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rv64-patchpoint.ll
  llvm/test/CodeGen/RISCV/rv64-stackmap-nops.ll
  llvm/test/CodeGen/RISCV/rv64-stackmap.ll
  llvm/test/CodeGen/RISCV/stackmap-frame-setup.ll
  llvm/test/CodeGen/RISCV/stackmap.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D123496.421920.patch
Type: text/x-patch
Size: 37181 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220411/686069be/attachment.bin>


More information about the llvm-commits mailing list