[llvm] 690bed0 - [X86][AMX] Fix infinite loop of getShape.
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Sat Apr 9 23:46:02 PDT 2022
Author: Luo, Yuanke
Date: 2022-04-10T14:44:51+08:00
New Revision: 690bed0cec7e3359b0136acd98c0940aed5d0722
URL: https://github.com/llvm/llvm-project/commit/690bed0cec7e3359b0136acd98c0940aed5d0722
DIFF: https://github.com/llvm/llvm-project/commit/690bed0cec7e3359b0136acd98c0940aed5d0722.diff
LOG: [X86][AMX] Fix infinite loop of getShape.
When walk the user chain to get the shape of a phi node. If it is phi
node in the chain, we should walk to the user of this phi node instead
of the original phi node.
Added:
Modified:
llvm/lib/Target/X86/X86LowerAMXType.cpp
llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86LowerAMXType.cpp b/llvm/lib/Target/X86/X86LowerAMXType.cpp
index 0fb8d07b6b61e..1596f3cb0bb5e 100644
--- a/llvm/lib/Target/X86/X86LowerAMXType.cpp
+++ b/llvm/lib/Target/X86/X86LowerAMXType.cpp
@@ -200,7 +200,7 @@ static std::pair<Value *, Value *> getShape(PHINode *Phi) {
} else if (isa<PHINode>(V)) {
if (V->use_empty())
break;
- Use &U = *(Phi->use_begin());
+ Use &U = *(V->use_begin());
V = U.getUser();
} else {
break;
diff --git a/llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll b/llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
index 67e4f3eea42bc..104fa5703e370 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-combine-undef.ll
@@ -1,6 +1,46 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt --codegen-opt-level=2 -mtriple=x86_64 -lower-amx-type %s -S | FileCheck %s
+define void @undef_2phi(i8 *%buf) {
+; CHECK-LABEL: @undef_2phi(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
+; CHECK-NEXT: br i1 undef, label [[L1:%.*]], label [[L2:%.*]]
+; CHECK: l1:
+; CHECK-NEXT: [[T1:%.*]] = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
+; CHECK-NEXT: br i1 undef, label [[L2]], label [[L3:%.*]]
+; CHECK: l2:
+; CHECK-NEXT: [[TMP1:%.*]] = phi x86_amx [ [[TMP0]], [[ENTRY:%.*]] ], [ [[T1]], [[L1]] ]
+; CHECK-NEXT: br i1 undef, label [[L3]], label [[EXIT:%.*]]
+; CHECK: l3:
+; CHECK-NEXT: [[TMP2:%.*]] = phi x86_amx [ [[TMP1]], [[L2]] ], [ [[T1]], [[L1]] ]
+; CHECK-NEXT: call void @llvm.x86.tilestored64.internal(i16 8, i16 32, i8* [[BUF:%.*]], i64 1024, x86_amx [[TMP2]])
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ br i1 undef, label %l1, label %l2
+
+l1:
+ %t1 = call x86_amx @llvm.x86.tilezero.internal(i16 8, i16 32)
+ %t2 = call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx %t1)
+ br i1 undef, label %l2, label %l3
+
+l2:
+ %t3 = phi <256 x i32> [ undef, %entry ], [ %t2, %l1 ]
+ br i1 undef, label %l3, label %exit
+
+l3:
+ %t4 = phi <256 x i32> [ %t3, %l2], [ %t2, %l1 ]
+ %t5 = call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> %t4)
+ call void @llvm.x86.tilestored64.internal(i16 8, i16 32, i8* %buf, i64 1024, x86_amx %t5)
+ br label %exit
+
+exit:
+ ret void
+}
+
define void @foo_undef(i8 *%buf) {
; CHECK-LABEL: @foo_undef(
; CHECK-NEXT: entry:
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