[PATCH] D123408: [InstCombine] Limit folding of cast into PHI

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

In D123408#3439571 <https://reviews.llvm.org/D123408#3439571>, @syzaara wrote:

> In D123408#3439555 <https://reviews.llvm.org/D123408#3439555>, @lebedev.ri wrote:
>
>> This seems like a vectorizer bug.
>
> The reason it doesn't get vectorized is because loop vectorizer sees a truncating and instruction in the def-use chain of the reduction phi. The IR that vectorizer sees looks like this:
>
>   define internal fastcc void @do_one() unnamed_addr #1 {
>   entry:
>     tail call void (i8*, ...) @obfuscate(i8* noundef bitcast ([8192 x i16]* @x to i8*)) #3
>     br label %for.body
>   
>   for.body:                                         ; preds = %entry, %for.body
>     %a.010 = phi i32 [ 0, %entry ], [ %phi.cast, %for.body ]
>     %i.09 = phi i64 [ 0, %entry ], [ %inc, %for.body ]
>     %arrayidx = getelementptr inbounds [8192 x i16], [8192 x i16]* @x, i64 0, i64 %i.09
>     %0 = load i16, i16* %arrayidx, align 2, !tbaa !6
>     %conv = zext i16 %0 to i32
>     %add = add nuw nsw i32 %a.010, %conv
>     %inc = add nuw nsw i64 %i.09, 1
>     %phi.cast = and i32 %add, 65535
>     %exitcond.not = icmp eq i64 %inc, 8192
>     br i1 %exitcond.not, label %for.end, label %for.body, !llvm.loop !10
>   
>   for.end:                                          ; preds = %for.body
>     %phi.cast.lcssa = phi i32 [ %phi.cast, %for.body ]
>     tail call void (i8*, ...) @obfuscate(i8* noundef bitcast ([8192 x i16]* @x to i8*), i32 noundef signext %phi.cast.lcssa) #3
>     ret void
>   }
>
> The %phi.cast = and i32 %add, 65535 instruction is not an ADD so the %a.010 phi doesn't qualify as an add reduction.
>
>   LV: Not vectorizing: Found an unidentified PHI %a.010 = phi i32 [ 0, %entry ], [ %phi.cast, %for.body ]

Yep, i agree. The vectorizer just needs to be able to understand that such an `and` effectively truncates the bit width.


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https://reviews.llvm.org/D123408