[llvm] 29fe998 - [VPlan] Preserve debug location when creating branch.

[Florian Hahn via llvm-commits]

Author: Florian Hahn
Date: 2022-04-08T17:22:53+02:00
New Revision: 29fe998eaa38d52d0f764800e17917cff1375598

URL: https://github.com/llvm/llvm-project/commit/29fe998eaa38d52d0f764800e17917cff1375598
DIFF: https://github.com/llvm/llvm-project/commit/29fe998eaa38d52d0f764800e17917cff1375598.diff

LOG: [VPlan] Preserve debug location when creating branch.

Update createEmptyBasicBlock to preserve the debug location of the
previous terminator.

Added: 
    

Modified: 
    llvm/lib/Transforms/Vectorize/VPlan.cpp
    llvm/test/Transforms/LoopVectorize/debugloc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/VPlan.cpp b/llvm/lib/Transforms/Vectorize/VPlan.cpp
index 73b2a86c3f472..64d582cfbedfc 100644
--- a/llvm/lib/Transforms/Vectorize/VPlan.cpp
+++ b/llvm/lib/Transforms/Vectorize/VPlan.cpp
@@ -280,8 +280,10 @@ VPBasicBlock::createEmptyBasicBlock(VPTransformState::CFGState &CFG) {
     if (isa<UnreachableInst>(PredBBTerminator)) {
       assert(PredVPSuccessors.size() == 1 &&
              "Predecessor ending w/o branch must have single successor.");
+      DebugLoc DL = PredBBTerminator->getDebugLoc();
       PredBBTerminator->eraseFromParent();
-      BranchInst::Create(NewBB, PredBB);
+      auto *Br = BranchInst::Create(NewBB, PredBB);
+      Br->setDebugLoc(DL);
     } else {
       assert(PredVPSuccessors.size() == 2 &&
              "Predecessor ending with branch must have two successors.");

diff  --git a/llvm/test/Transforms/LoopVectorize/debugloc.ll b/llvm/test/Transforms/LoopVectorize/debugloc.ll
index 9c72232255c41..c639ebfc709f8 100644
--- a/llvm/test/Transforms/LoopVectorize/debugloc.ll
+++ b/llvm/test/Transforms/LoopVectorize/debugloc.ll
@@ -70,8 +70,7 @@ define i32 @test_debug_loc_on_branch_in_loop(i32* noalias %src, i32* noalias %ds
 ; CHECK-NEXT: pred.store.if:
 ; CHECK-NEXT:   [[GEP:%.+]] = getelementptr inbounds i32, i32* %dst, i64 {{.+}}, !dbg [[LOC3]]
 ; CHECK-NEXT:   store i32 0, i32* [[GEP]], align 4, !dbg [[LOC3]]
-; CHECK-NEXT:   br label %pred.store.continue
-; CHECK-NOT:  !dbg
+; CHECK-NEXT:   br label %pred.store.continue, !dbg [[LOC3]]
 ; CHECK-EMPTY:
 ;
 entry: