[PATCH] D123324: [VP] Explicitly map from VP intrinsic to ISD opcode
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 8 04:45:37 PDT 2022
frasercrmck marked an inline comment as done.
frasercrmck added inline comments.
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Comment at: llvm/include/llvm/IR/VPIntrinsics.def:313
+// VP_SETCC (ISel only)
+BEGIN_REGISTER_VP_SDNODE(VP_SETCC, 0, vp_setcc, 3, 4)
+END_REGISTER_VP_SDNODE(VP_SETCC)
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craig.topper wrote:
> Does anything use the operand that vp_setcc is being used for? Can we remove it in follow up?
I might have misunderstood, but, do you mean the third operand? I think that's the name that's used when dumping the node (`SDNode::getOperationName`). The comments suggest it's also the TableGen operator name but I don't think we're doing anything like that. I'd have to check the reference patches to see if that actually came to fruition anywhere.
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Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:7325-7327
+#define HELPER_MAP_VPID_TO_VPSD(VPID, VPSD) \
+ case Intrinsic::VPID: \
+ ResOPC = ISD::VPSD; \
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rogfer01 wrote:
> Formatting is a bit odd here, `clang-format` usually vertically aligns the backslashes.
Ah yes good spot, thank you. I think I renamed the macro at one point and forgot to reformat it.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D123324/new/
https://reviews.llvm.org/D123324
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