[llvm] b536f24 - [AMDGPU] Use GCNPat in the buffer atomic pattern multiclasses

Abinav Puthan Purayil via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 8 03:58:57 PDT 2022


Author: Abinav Puthan Purayil
Date: 2022-04-08T16:28:11+05:30
New Revision: b536f24d2207ce6071b73aedc7c095f8b2bd642f

URL: https://github.com/llvm/llvm-project/commit/b536f24d2207ce6071b73aedc7c095f8b2bd642f
DIFF: https://github.com/llvm/llvm-project/commit/b536f24d2207ce6071b73aedc7c095f8b2bd642f.diff

LOG: [AMDGPU] Use GCNPat in the buffer atomic pattern multiclasses

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/BUFInstructions.td

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/BUFInstructions.td b/llvm/lib/Target/AMDGPU/BUFInstructions.td
index 25b44238f6555..80ae6f69e76cc 100644
--- a/llvm/lib/Target/AMDGPU/BUFInstructions.td
+++ b/llvm/lib/Target/AMDGPU/BUFInstructions.td
@@ -1383,13 +1383,13 @@ multiclass BufferAtomicPat<string OpPrefix, ValueType vt, string Inst> {
   defvar Op = !cast<SDPatternOperator>(OpPrefix # "_" # RtnMode # "_" # vt.Size);
   defvar InstSuffix = !if(!eq(RtnMode, "ret"), "_RTN", "");
 
-  def : Pat<
+  def : GCNPat<
     (vt (Op (MUBUFOffset v4i32:$srsrc, i32:$soffset, i16:$offset), vt:$vdata_in)),
     (!cast<MUBUF_Pseudo>(Inst # "_OFFSET" # InstSuffix) getVregSrcForVT<vt>.ret:$vdata_in,
       SReg_128:$srsrc, SCSrc_b32:$soffset, offset:$offset)
   >;
 
-  def : Pat<
+  def : GCNPat<
     (vt (Op (MUBUFAddr64 v4i32:$srsrc, i64:$vaddr, i32:$soffset, i16:$offset),
       vt:$vdata_in)),
     (!cast<MUBUF_Pseudo>(Inst # "_ADDR64" # InstSuffix) getVregSrcForVT<vt>.ret:$vdata_in,
@@ -1409,7 +1409,7 @@ multiclass BufferAtomicCmpSwapPat<ValueType vt, ValueType data_vt, string Inst>
   defvar OffsetResDag = (!cast<MUBUF_Pseudo>(Inst # "_OFFSET" # InstSuffix)
     getVregSrcForVT<data_vt>.ret:$vdata_in, SReg_128:$srsrc, SCSrc_b32:$soffset,
     offset:$offset);
-  def : Pat<
+  def : GCNPat<
     (vt (Op (MUBUFOffset v4i32:$srsrc, i32:$soffset, i16:$offset), data_vt:$vdata_in)),
     !if(!eq(RtnMode, "ret"),
       (EXTRACT_SUBREG (vt (COPY_TO_REGCLASS OffsetResDag, getVregSrcForVT<data_vt>.ret)),
@@ -1420,7 +1420,7 @@ multiclass BufferAtomicCmpSwapPat<ValueType vt, ValueType data_vt, string Inst>
   defvar Addr64ResDag = (!cast<MUBUF_Pseudo>(Inst # "_ADDR64" # InstSuffix)
     getVregSrcForVT<data_vt>.ret:$vdata_in, VReg_64:$vaddr, SReg_128:$srsrc,
     SCSrc_b32:$soffset, offset:$offset);
-  def : Pat<
+  def : GCNPat<
     (vt (Op (MUBUFAddr64 v4i32:$srsrc, i64:$vaddr, i32:$soffset, i16:$offset),
       data_vt:$vdata_in)),
     !if(!eq(RtnMode, "ret"),


        


More information about the llvm-commits mailing list