[PATCH] D123371: [RISCV][RVV] Add a writefrm insert pass to support vfcvt with static rounding mode

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 8 02:31:57 PDT 2022


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V spec says `vfcvt` instructions use the round mode in `frm`, except for the `rtz` variants.
To implement `floor`/`ceil` with vfcvt instructions,  we can change the frm to `rdn`/`rup` temporarily.

Following D122860 <https://reviews.llvm.org/D122860>, this patch provides a pass that insert writefrm for pseudos having FPRndModeOp and adds an intrinsic `vfcvt.rdn.x.f.v` for testing the purpose.
For now it only works for non-strictfp functions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D123371

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/CMakeLists.txt
  llvm/lib/Target/RISCV/RISCV.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInsertWriteFRM.cpp
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
  llvm/test/CodeGen/RISCV/O0-pipeline.ll
  llvm/test/CodeGen/RISCV/O3-pipeline.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-rdn-x-f.ll
  llvm/test/CodeGen/RISCV/rvv/writefrm-insert.ll
  llvm/test/CodeGen/RISCV/rvv/writefrm-insert.mir

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