[PATCH] D123348: [AMDGPU] Fix inline asm causing assert during PreRARematerialize stage in scheduler pass

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:744
     MachineInstr *Def = MRI.getOneDef(Reg)->getParent();
-    if (!Def || Def->getOperand(0).getSubReg() != 0 ||
+    MachineOperand &Op = Def->getOperand(0);
+    if (!Def || !Op.isReg() || Op.getSubReg() != 0 ||
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arsenm wrote:
> Null dereference before null check
getOneDef already returns a specific operand, so it seems odd to ignore this and look at operand 0 of the same instruction instead. Maybe check getOperandNo() == 0 instead if that's what you want?


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:745
+    MachineOperand &Op = Def->getOperand(0);
+    if (!Def || !Op.isReg() || Op.getSubReg() != 0 ||
         !isTriviallyReMaterializable(*Def, AA))
----------------
How could Def ever be null here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123348/new/

https://reviews.llvm.org/D123348