[PATCH] D122860: [RISCV][RVV] Add FPRndModeOp to PseudoVFCVT instructions

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb updated this revision to Diff 421439.
arcbbb added a comment.

rebased


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122860/new/

https://reviews.llvm.org/D122860

Files:
  llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVInstrFormats.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/lib/Target/RISCV/RISCVMCInstLower.cpp

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