[PATCH] D122672: [CodeGen][ARM] Enable Swing Module Scheduling for ARM

David Penry via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 7 08:05:05 PDT 2022


dpenry added a comment.

In D122672#3434900 <https://reviews.llvm.org/D122672#3434900>, @bcahoon wrote:

> It's great to see extensions to the pipeliner so that it works on more targets and loops that don't assume a hardware loop.  A little while back a couple of functions, see shoulgnoreForPipelining, were added to support regular loops. However, I don't see that function used. Perhaps that effort was never completely finished? Do we need to get rid of that function, or try to combine the work you've done with that work?

shouldIgnoreForPipelining is being called in SMSchedule::computeUnpipelinableNodes and is implemented in ARMPipelinerLoopInfo.  I have made a slight change to its semantics.  Instead of returning true for all instructions which should stay in stage 0, it need only return a "seed" instruction -- typically the one which computes the loop exit condition.  Then computeUnpipelineableNodes finds all the transitive fan-in to that instruction in the dependence graph and marks those instructions as staying in stage 0 -- which is required for correctness.  I moved the discovery of the transitive fan-in into SMSchedule because a) all regular loops on any architecture are going to need to do this, so common code seems a good place for it; and b) SMSchedule has been given the dependence graph, so it already has the information needed to compute the transitive fan-in, while shouldIgnoreForPipelining would have needed an interface change to get the best/most information (either the graph or things like AA needed to compute an equivalent graph).  Note also that this will work not just for loops with a nice canonical induction variable, but also is correct for while loops and loops in which the exit condition is memory-dependent.


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