[llvm] cfcac26 - [CSKY] Support bitcast operation from/to double to/from two GPRs

[Zi Xuan Wu via llvm-commits]

Author: Zi Xuan Wu
Date: 2022-04-07T18:36:04+08:00
New Revision: cfcac264e2d94c62ac107a82035695919b5d1633

URL: https://github.com/llvm/llvm-project/commit/cfcac264e2d94c62ac107a82035695919b5d1633
DIFF: https://github.com/llvm/llvm-project/commit/cfcac264e2d94c62ac107a82035695919b5d1633.diff

LOG: [CSKY] Support bitcast operation from/to double to/from two GPRs

In soft ABI, floating num is passing in GPRs. So we need support
bitcovert from double to Hi and Lo GPRs and vice versa

Added: 
    llvm/test/CodeGen/CSKY/fpu/float-abi.ll

Modified: 
    llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp b/llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp
index 812ab9b3942f4..b893487f1f0f1 100644
--- a/llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp
+++ b/llvm/lib/Target/CSKY/CSKYISelDAGToDAG.cpp
@@ -43,6 +43,7 @@ class CSKYDAGToDAGISel : public SelectionDAGISel {
   void Select(SDNode *N) override;
   bool selectAddCarry(SDNode *N);
   bool selectSubCarry(SDNode *N);
+  bool selectBITCAST_TO_LOHI(SDNode *N);
   bool selectInlineAsm(SDNode *N);
 
   SDNode *createGPRPairNode(EVT VT, SDValue V0, SDValue V1);
@@ -93,6 +94,9 @@ void CSKYDAGToDAGISel::Select(SDNode *N) {
     IsSelected = true;
     break;
   }
+  case CSKYISD::BITCAST_TO_LOHI:
+    IsSelected = selectBITCAST_TO_LOHI(N);
+    break;
   case ISD::INLINEASM:
   case ISD::INLINEASM_BR:
     IsSelected = selectInlineAsm(N);
@@ -267,6 +271,24 @@ bool CSKYDAGToDAGISel::selectInlineAsm(SDNode *N) {
   return true;
 }
 
+bool CSKYDAGToDAGISel::selectBITCAST_TO_LOHI(SDNode *N) {
+  SDLoc Dl(N);
+  auto VT = N->getValueType(0);
+  auto V = N->getOperand(0);
+
+  if (!Subtarget->hasFPUv2DoubleFloat())
+    return false;
+
+  SDValue V1 = SDValue(CurDAG->getMachineNode(CSKY::FMFVRL_D, Dl, VT, V), 0);
+  SDValue V2 = SDValue(CurDAG->getMachineNode(CSKY::FMFVRH_D, Dl, VT, V), 0);
+
+  ReplaceUses(SDValue(N, 0), V1);
+  ReplaceUses(SDValue(N, 1), V2);
+  CurDAG->RemoveDeadNode(N);
+
+  return true;
+}
+
 bool CSKYDAGToDAGISel::selectAddCarry(SDNode *N) {
   MachineSDNode *NewNode = nullptr;
   auto Type0 = N->getValueType(0);

diff  --git a/llvm/test/CodeGen/CSKY/fpu/float-abi.ll b/llvm/test/CodeGen/CSKY/fpu/float-abi.ll
new file mode 100644
index 0000000000000..8f8df14d394fa
--- /dev/null
+++ b/llvm/test/CodeGen/CSKY/fpu/float-abi.ll
@@ -0,0 +1,34 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+
+; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky  -mattr=+2e3 -mattr=+fpuv2_sf -mattr=+fpuv2_df -mattr=+hard-float | FileCheck %s
+
+define float @FADD_FLOAT(float %x, float %y) {
+; CHECK-LABEL: FADD_FLOAT:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    fmtvrl vr0, a1
+; CHECK-NEXT:    fmtvrl vr1, a0
+; CHECK-NEXT:    fadds vr0, vr0, vr1
+; CHECK-NEXT:    fmfvrl a0, vr0
+; CHECK-NEXT:    rts16
+entry:
+  %fadd = fadd  float %y, %x
+  ret float %fadd
+}
+
+define double @FADD_DOUBLE(double %x, double %y) {
+; CHECK-LABEL: FADD_DOUBLE:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    fmtvrl vr0, a0
+; CHECK-NEXT:    fmtvrh vr0, a1
+; CHECK-NEXT:    fmtvrl vr1, a2
+; CHECK-NEXT:    fmtvrh vr1, a3
+; CHECK-NEXT:    faddd vr0, vr1, vr0
+; CHECK-NEXT:    fmfvrl a0, vr0
+; CHECK-NEXT:    fmfvrh a1, vr0
+; CHECK-NEXT:    rts16
+entry:
+  %fadd = fadd  double %y, %x
+  ret double %fadd
+}
+
+