[llvm] aa1b22d - [AMDGPU] Add a test for setting EXTRA_LDS_SIZE in pixel shaders

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 6 02:53:37 PDT 2022


Author: Jay Foad
Date: 2022-04-06T10:49:55+01:00
New Revision: aa1b22db0f51bc053ff16874ba1be3bacec53cf8

URL: https://github.com/llvm/llvm-project/commit/aa1b22db0f51bc053ff16874ba1be3bacec53cf8
DIFF: https://github.com/llvm/llvm-project/commit/aa1b22db0f51bc053ff16874ba1be3bacec53cf8.diff

LOG: [AMDGPU] Add a test for setting EXTRA_LDS_SIZE in pixel shaders

Added: 
    llvm/test/CodeGen/AMDGPU/extra-lds-size.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll b/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
new file mode 100644
index 0000000000000..0df9d3e41d0e8
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/extra-lds-size.ll
@@ -0,0 +1,17 @@
+; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10-PAL %s
+; RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1010 < %s | FileCheck -check-prefix=GFX10-MESA %s
+
+; Check EXTRA_LDS_SIZE in SPI_SHADER_PGM_RSRC2_PS.
+
+; GFX10-PAL: 0x2c0b (SPI_SHADER_PGM_RSRC2_PS): 0x800
+
+; GFX10-MESA: .long 45100
+; GFX10-MESA-NEXT: .long 2048
+
+ at lds = internal addrspace(3) global [4096 x i8] undef
+
+define amdgpu_ps void @global_store_saddr_uniform_ptr_in_vgprs(i32 %voffset) {
+  %ptr = getelementptr [4096 x i8], [4096 x i8] addrspace(3)* @lds, i32 0, i32 %voffset
+  store i8 0, i8 addrspace(3)* %ptr
+  ret void
+}


        


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