[llvm] 30922d6 - [GlobalISel] NFC: Add some test coverage for s158
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Tue Apr 5 15:11:40 PDT 2022
Author: Jessica Paquette
Date: 2022-04-05T15:11:22-07:00
New Revision: 30922d62f420731d0a7808c015e69fe6f0ce2e4d
URL: https://github.com/llvm/llvm-project/commit/30922d62f420731d0a7808c015e69fe6f0ce2e4d
DIFF: https://github.com/llvm/llvm-project/commit/30922d62f420731d0a7808c015e69fe6f0ce2e4d.diff
LOG: [GlobalISel] NFC: Add some test coverage for s158
158 = 32 * 5 - 2
This is a wide type which may benefit from a different widening scheme than
types which are multiples of 64. For example, if 32-bit and 64-bit scalars
are both allowed, and a type is a multiple of 32, or is closer to a multiple
of 32, it *may* be better to
- Widen to the wide multiple of 32
- Break up the type into 32-bit chunks
Anyway, we don't have any test coverage for this at all, so for the sake of
making sure we test it, let's add some test coverage.
Added:
Modified:
llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
index 17daa4e1003e4..27ab81c4988fb 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-and.mir
@@ -114,3 +114,47 @@ body: |
%and:_(s318) = G_AND %a, %b
G_STORE %and(s318), %ptr(p0) :: (store (s318))
RET_ReallyLR implicit $x0
+...
+---
+name: test_s158_and
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0
+ ; CHECK-LABEL: name: test_s158_and
+ ; CHECK: liveins: $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4611686018427387903
+ ; CHECK-NEXT: [[AND5:%[0-9]+]]:_(s64) = G_AND [[AND]], [[C]]
+ ; CHECK-NEXT: [[AND6:%[0-9]+]]:_(s64) = G_AND [[AND1]], [[C]]
+ ; CHECK-NEXT: [[AND7:%[0-9]+]]:_(s64) = G_AND [[AND2]], [[C]]
+ ; CHECK-NEXT: [[AND8:%[0-9]+]]:_(s64) = G_AND [[AND3]], [[C]]
+ ; CHECK-NEXT: [[AND9:%[0-9]+]]:_(s64) = G_AND [[AND4]], [[C1]]
+ ; CHECK-NEXT: G_STORE [[AND5]](s64), %ptr(p0) :: (store (s64), align 64)
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
+ ; CHECK-NEXT: G_STORE [[AND6]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
+ ; CHECK-NEXT: G_STORE [[AND7]](s64), [[PTR_ADD1]](p0) :: (store (s64) into unknown-address + 16, align 16)
+ ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 24
+ ; CHECK-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
+ ; CHECK-NEXT: G_STORE [[AND8]](s64), [[PTR_ADD2]](p0) :: (store (s64) into unknown-address + 24)
+ ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
+ ; CHECK-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
+ ; CHECK-NEXT: G_STORE [[AND9]](s64), [[PTR_ADD3]](p0) :: (store (s64) into unknown-address + 32, align 32)
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0
+ %a:_(s318) = G_IMPLICIT_DEF
+ %b:_(s318) = G_IMPLICIT_DEF
+ %ptr:_(p0) = COPY $x0
+ %and:_(s318) = G_AND %a, %b
+ G_STORE %and(s318), %ptr(p0) :: (store (s318))
+ RET_ReallyLR implicit $x0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
index ce91317bf91bb..afba01909be60 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 %s -o - | FileCheck %s
+# RUN: llc -O0 -march=aarch64 -run-pass=legalizer -global-isel-abort=1 -verify-machineinstrs %s -o - | FileCheck %s
---
name: test_icmp
body: |
@@ -189,6 +189,7 @@ body: |
; CHECK-LABEL: name: test_s96_eq
; CHECK: bb.0:
; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: {{ $}}
; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 4294967295
@@ -279,3 +280,48 @@ body: |
successors:
bb.3:
RET_ReallyLR
+...
+---
+name: test_s158_eq
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: test_s158_eq
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
+ ; CHECK: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[AND3:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
+ ; CHECK: [[AND4:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND5:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK: [[AND6:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK: [[AND7:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C2]]
+ ; CHECK: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[AND]], [[AND4]]
+ ; CHECK: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[AND1]], [[AND5]]
+ ; CHECK: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[AND2]], [[AND6]]
+ ; CHECK: [[XOR3:%[0-9]+]]:_(s64) = G_XOR [[AND3]], [[AND7]]
+ ; CHECK: [[OR:%[0-9]+]]:_(s64) = G_OR [[XOR]], [[XOR1]]
+ ; CHECK: [[OR1:%[0-9]+]]:_(s64) = G_OR [[OR]], [[XOR2]]
+ ; CHECK: [[OR2:%[0-9]+]]:_(s64) = G_OR [[OR1]], [[XOR3]]
+ ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR2]](s64), [[C2]]
+ ; CHECK: %cmp:_(s1) = G_TRUNC [[ICMP]](s32)
+ ; CHECK: G_BRCOND %cmp(s1), %bb.1
+ ; CHECK: G_BR %bb.2
+ ; CHECK: bb.1:
+ ; CHECK: successors:
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.1:
+ %lhs:_(s158) = G_IMPLICIT_DEF
+ %rhs:_(s158) = G_IMPLICIT_DEF
+ %cmp:_(s1) = G_ICMP intpred(eq), %lhs(s158), %rhs
+ G_BRCOND %cmp(s1), %bb.2
+ G_BR %bb.3
+ bb.2:
+ successors:
+ bb.3:
+ RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
index 89e8d13cb678e..fd750ead2da71 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir
@@ -110,3 +110,34 @@ body: |
G_STORE %cst(s318), %ptr(p0) :: (store (s318))
RET_ReallyLR implicit $w0
...
+---
+name: s158
+registers:
+body: |
+ bb.0:
+ liveins: $x0
+ ; CHECK-LABEL: name: s158
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 1234
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
+ ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[C]], [[C2]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C2]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[C1]], [[C3]]
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
+ ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
+ ; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
+ ; CHECK-NEXT: [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C4]](s64)
+ ; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
+ ; CHECK-NEXT: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C5]](s64)
+ ; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %cst:_(s158) = G_CONSTANT i158 1234
+ %ptr:_(p0) = COPY $x0
+ G_STORE %cst(s158), %ptr(p0) :: (store (s158))
+ RET_ReallyLR implicit $w0
+...
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
index 0676da140df41..57ed9d91029b3 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-non-pow2-load-store.mir
@@ -107,3 +107,36 @@ body: |
%val:_(s318) = G_IMPLICIT_DEF
G_STORE %val(s318), %ptr(p0) :: (store (s318), align 8)
RET_ReallyLR
+...
+---
+name: store_s158
+alignment: 4
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0
+ ; CHECK-LABEL: name: store_s158
+ ; CHECK: liveins: $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[DEF]], [[C1]]
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
+ ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
+ ; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64))
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
+ ; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
+ ; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 8)
+ ; CHECK-NEXT: RET_ReallyLR
+ %ptr:_(p0) = COPY $x0
+ %val:_(s158) = G_IMPLICIT_DEF
+ G_STORE %val(s158), %ptr(p0) :: (store (s158), align 8)
+ RET_ReallyLR
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
index e0c3ba0381710..bafbf842e91dc 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-xor.mir
@@ -108,3 +108,40 @@ body: |
%xor:_(s319) = G_XOR %a, %b
G_STORE %xor(s319), %ptr(p0) :: (store (s319))
RET_ReallyLR implicit $x0
+...
+---
+name: test_s158_xor
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0
+ ; CHECK-LABEL: name: test_s158_xor
+ ; CHECK: liveins: $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
+ ; CHECK-NEXT: %ptr:_(p0) = COPY $x0
+ ; CHECK-NEXT: [[XOR:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[XOR1:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[XOR2:%[0-9]+]]:_(s64) = G_XOR [[DEF]], [[DEF]]
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 -1
+ ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1073741823
+ ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[XOR]], [[C]]
+ ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s64) = G_AND [[XOR1]], [[C]]
+ ; CHECK-NEXT: [[AND2:%[0-9]+]]:_(s64) = G_AND [[XOR2]], [[C1]]
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[AND]](s64)
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY [[AND1]](s64)
+ ; CHECK-NEXT: [[EXTRACT:%[0-9]+]]:_(s32) = G_EXTRACT [[AND2]](s64), 0
+ ; CHECK-NEXT: G_STORE [[COPY]](s64), %ptr(p0) :: (store (s64), align 32)
+ ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
+ ; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C2]](s64)
+ ; CHECK-NEXT: G_STORE [[COPY1]](s64), [[PTR_ADD]](p0) :: (store (s64) into unknown-address + 8)
+ ; CHECK-NEXT: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
+ ; CHECK-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD %ptr, [[C3]](s64)
+ ; CHECK-NEXT: G_STORE [[EXTRACT]](s32), [[PTR_ADD1]](p0) :: (store (s32) into unknown-address + 16, align 16)
+ ; CHECK-NEXT: RET_ReallyLR implicit $x0
+ %a:_(s158) = G_IMPLICIT_DEF
+ %b:_(s158) = G_IMPLICIT_DEF
+ %ptr:_(p0) = COPY $x0
+ %xor:_(s158) = G_XOR %a, %b
+ G_STORE %xor(s158), %ptr(p0) :: (store (s158))
+ RET_ReallyLR implicit $x0
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