[llvm] 60c6e96 - [Hexagon] Fix out of range shift warning. NFC.

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-04-05T13:45:17+01:00
New Revision: 60c6e9649de8ce9e6818b2d92f1d45ba6da49ca8

URL: https://github.com/llvm/llvm-project/commit/60c6e9649de8ce9e6818b2d92f1d45ba6da49ca8
DIFF: https://github.com/llvm/llvm-project/commit/60c6e9649de8ce9e6818b2d92f1d45ba6da49ca8.diff

LOG: [Hexagon] Fix out of range shift warning. NFC.

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
index 681f320376ea6..4e71e9f249739 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
@@ -1540,7 +1540,7 @@ bool HexagonDAGToDAGISel::keepsLowBits(const SDValue &Val, unsigned NumBits,
     break;
   case ISD::AND: {
     // Check if this is an AND with NumBits of lower bits set to 1.
-    uint64_t Mask = (1 << NumBits) - 1;
+    uint64_t Mask = (1ULL << NumBits) - 1;
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(0))) {
       if (C->getZExtValue() == Mask) {
         Src = Val.getOperand(1);
@@ -1558,7 +1558,7 @@ bool HexagonDAGToDAGISel::keepsLowBits(const SDValue &Val, unsigned NumBits,
   case ISD::OR:
   case ISD::XOR: {
     // OR/XOR with the lower NumBits bits set to 0.
-    uint64_t Mask = (1 << NumBits) - 1;
+    uint64_t Mask = (1ULL << NumBits) - 1;
     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Val.getOperand(0))) {
       if ((C->getZExtValue() & Mask) == 0) {
         Src = Val.getOperand(1);