[PATCH] D123109: [x86] improve select lowering for smin(x, 0) & smax(x, 0)

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 5 01:49:21 PDT 2022


RKSimon added a reviewer: RKSimon.
RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:24702
+  // (select (x > 0), x, 0) -> (~(x >> (size_in_bits(x)-1))) & x
+  // (select (x < 0), x, 0) -> ((x >> (size_in_bits(x)-1))) & x
   if (Cond.getOpcode() == X86ISD::SETCC &&
----------------
What about the more general cases (select (x > 0), y, 0) & (select (x < 0), y, 0)?

Although I think that requires a freeze:
```
define i8 @src(i8 %x, i8 %y) {
%0:
  %c = icmp sge i8 %x, 0
  %r = select i1 %c, i8 %y, i8 0
  ret i8 %r
}
=>
define i8 @tgt(i8 %x, i8 %y) {
%0:
  %c = ashr i8 %x, 7
  %m = xor i8 %c, 255
  %f = freeze i8 %y
  %r = and i8 %m, %f
  ret i8 %r
}
Transformation seems to be correct!
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D123109/new/

https://reviews.llvm.org/D123109



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