[PATCH] D122377: [PowerPC] Support 16-byte lock free atomics on pwr8 and up

[Hubert Tong via Phabricator via llvm-commits]

hubert.reinterpretcast added inline comments.


================
Comment at: clang/lib/Basic/Targets/PPC.h:443
 
-    // PPC64 supports atomics up to 8 bytes.
-    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
+    // PPC64 supports atomics up to 16 bytes.
+    MaxAtomicPromoteWidth = 128;
----------------
Clarify that the statement is not for PPC64 in general.


================
Comment at: clang/lib/Basic/Targets/PPC.h:445
+    MaxAtomicPromoteWidth = 128;
+    // PPC64 supports inlining atomics up to 8 bytes.
+    MaxAtomicInlineWidth = 64;
----------------
Clarify that the support up to 8 bytes is for "baseline" PPC64 (i.e., non-baseline implementations may support lock-free inline 16-byte atomic operations).


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:18033
+         (EnableQuadwordAtomics ||
+          Subtarget.getTargetTriple().isOSBinFormatELF()) &&
+         Subtarget.hasQuadwordAtomics();
----------------
Can we have a comment here to explain the `isOSBinFormatELF` check?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122377/new/

https://reviews.llvm.org/D122377