[PATCH] D122929: [BOLT] Fix remove double jumps peephole pass
Rafael Auler via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 4 15:49:49 PDT 2022
rafauler added a comment.
Thanks for fixing! I think we should probably modify MCPlusBuilder.h instead. In that way we make the AArch64 backend behave in the same way as the X86 one.
================
Comment at: bolt/lib/Passes/BinaryPasses.cpp:700
MCInst *Branch = Pred->getLastNonPseudoInstr();
- if (Branch && MIB->isUnconditionalBranch(*Branch)) {
- assert(MIB->getTargetSymbol(*Branch) == BB.getLabel());
+ if (Branch && MIB->isUnconditionalBranch(*Branch) &&
+ MIB->getTargetSymbol(*Branch) == BB.getLabel()) {
----------------
This is out of sync with X86. In X86, isUnconditionalBranch only returns true if it is also not a tail call:
return Analysis->isBranch(Inst) && !isTailCall(Inst);
For consistency, AArch64MCPlusBuilder should probably do the same at MCPlusBuilder.h:356.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D122929/new/
https://reviews.llvm.org/D122929
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