[PATCH] D123051: [RISCV][VP] Add basic RVV codegen for vp.fcmp

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

> There is still a general lack of canonicalization on VP_SETCC as opposed
> to SETCC which results in worse code than is theoretically possible.

What canonicalizations are missing. For integer, I know we're missing canonicalizing constants to RHS, but we don't do that for FP ISD::SETCC.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:3656
     int TrueValue;
     switch (TLI.getBooleanContents(Tmp1.getValueType())) {
     case TargetLowering::ZeroOrOneBooleanContent:
----------------
Not related to this patch, but is this equivalent to SelectionDAG::getBoolConstant with true for the `V` parameter? If we agree it is, I'll write a patch to replace it.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:9198
   NeedInvert = false;
+  bool IsVP = Mask != SDValue() || EVL != SDValue();
   switch (TLI.getCondCodeAction(CCCode, OpVT)) {
----------------
It would be an error if only one was SDValue() right? Should we assert that?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D123051/new/

https://reviews.llvm.org/D123051