[llvm] 368d35a - [LV] Add addiitonal tests for pointer difference memory checks.
Florian Hahn via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 4 09:59:08 PDT 2022
Author: Florian Hahn
Date: 2022-04-04T17:58:48+01:00
New Revision: 368d35a89440c8e3e65020e0b4c04f0914d60008
URL: https://github.com/llvm/llvm-project/commit/368d35a89440c8e3e65020e0b4c04f0914d60008
DIFF: https://github.com/llvm/llvm-project/commit/368d35a89440c8e3e65020e0b4c04f0914d60008.diff
LOG: [LV] Add addiitonal tests for pointer difference memory checks.
Additional tests for D119078.
Added:
llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/runtime-checks-
diff erence.ll b/llvm/test/Transforms/LoopVectorize/runtime-checks-
diff erence.ll
new file mode 100644
index 0000000000000..2c6a2e53bccd7
--- /dev/null
+++ b/llvm/test/Transforms/LoopVectorize/runtime-checks-
diff erence.ll
@@ -0,0 +1,195 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S | FileCheck %s
+
+target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
+
+define void @same_step_and_size(i32* %a, i32* %b, i64 %n) {
+; CHECK-LABEL: @same_step_and_size(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
+; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep.a = getelementptr inbounds i32, i32* %a, i64 %iv
+ %l = load i32, i32* %gep.a
+ %mul = mul nsw i32 %l, 3
+ %gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
+ store i32 %mul, i32* %gep.b
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @same_step_and_size_no_dominance_between_accesses(i32* %a, i32* %b, i64 %n, i64 %x) {
+; CHECK-LABEL: @same_step_and_size_no_dominance_between_accesses(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
+; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop.latch ]
+ %cmp = icmp ne i64 %iv, %x
+ br i1 %cmp, label %then, label %else
+
+then:
+ %gep.a = getelementptr inbounds i32, i32* %a, i64 %iv
+ store i32 0, i32* %gep.a
+ br label %loop.latch
+
+else:
+ %gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
+ store i32 10, i32* %gep.b
+ br label %loop.latch
+
+loop.latch:
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @
diff erent_steps_and_
diff erent_access_sizes(i16* %a, i32* %b, i64 %n) {
+; CHECK-LABEL: @
diff erent_steps_and_
diff erent_access_sizes(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
+; CHECK-NEXT: [[A3:%.*]] = bitcast i16* [[A:%.*]] to i8*
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i16, i16* [[A]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i16* [[SCEVGEP4]] to i8*
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep.a = getelementptr inbounds i16, i16* %a, i64 %iv
+ %l = load i16, i16* %gep.a
+ %l.ext = sext i16 %l to i32
+ %mul = mul nsw i32 %l.ext, 3
+ %gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
+ store i32 %mul, i32* %gep.b
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+define void @steps_match_but_
diff erent_access_sizes_1([2 x i16]* %a, i32* %b, i64 %n) {
+; CHECK-LABEL: @steps_match_but_
diff erent_access_sizes_1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A:%.*]], i64 0, i64 1
+; CHECK-NEXT: [[SCEVGEP34:%.*]] = bitcast i16* [[SCEVGEP3]] to i8*
+; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A]], i64 [[N]], i64 0
+; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i16* [[SCEVGEP5]] to i8*
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP56]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[SCEVGEP34]], [[SCEVGEP2]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep.a = getelementptr inbounds [2 x i16], [2 x i16]* %a, i64 %iv, i64 1
+ %l = load i16, i16* %gep.a
+ %l.ext = sext i16 %l to i32
+ %mul = mul nsw i32 %l.ext, 3
+ %gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
+ store i32 %mul, i32* %gep.b
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %loop
+
+exit:
+ ret void
+}
+
+; Same as @steps_match_but_
diff erent_access_sizes_1, but with source and sink
+; accesses flipped.
+define void @steps_match_but_
diff erent_access_sizes_2([2 x i16]* %a, i32* %b, i64 %n) {
+; CHECK-LABEL: @steps_match_but_
diff erent_access_sizes_2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[B4:%.*]] = bitcast i32* [[B:%.*]] to i8*
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N:%.*]], 4
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %scalar.ph, label %vector.memcheck
+; CHECK: vector.memcheck:
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A:%.*]], i64 0, i64 1
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = bitcast i16* [[SCEVGEP]] to i8*
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr [2 x i16], [2 x i16]* [[A]], i64 [[N]], i64 0
+; CHECK-NEXT: [[SCEVGEP23:%.*]] = bitcast i16* [[SCEVGEP2]] to i8*
+; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i32, i32* [[B]], i64 [[N]]
+; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i32* [[SCEVGEP5]] to i8*
+; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[SCEVGEP1]], [[SCEVGEP56]]
+; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[B4]], [[SCEVGEP23]]
+; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
+; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label %scalar.ph, label %vector.ph
+;
+entry:
+ br label %loop
+
+loop:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
+ %gep.b = getelementptr inbounds i32, i32* %b, i64 %iv
+ %l = load i32, i32* %gep.b
+ %mul = mul nsw i32 %l, 3
+ %gep.a = getelementptr inbounds [2 x i16], [2 x i16]* %a, i64 %iv, i64 1
+ %trunc = trunc i32 %mul to i16
+ store i16 %trunc, i16* %gep.a
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, %n
+ br i1 %exitcond, label %exit, label %loop
+
+exit:
+ ret void
+}
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