[PATCH] D122709: [RISCV] Enable cross basic block aware writevxrm insertion

ShihPo Hung via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Apr 3 08:16:16 PDT 2022


arcbbb added a comment.

In D122709#3425094 <https://reviews.llvm.org/D122709#3425094>, @kito-cheng wrote:

> I think that's we treating different view for `vxrm`, ABI was said same as `frm`, but now we plan to pull that out due to controversial for now, but I still not convinced for that, we pull out that out for prevent making short-sighted ABI decision, but you go this way means we made decision on close the possibility of `venv`, and that made dynamic rounding mode more unpredictable IMO.

I want to provide a call-clobbered based implementation for reference to support the idea and hopefully can get some comments & feedback. 
I think it will not get merged until the ABI says so. Sorry for the confusion.
About the psABI discussion I would suggest we go https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/256. Thanks.


Repository:
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  https://reviews.llvm.org/D122709/new/

https://reviews.llvm.org/D122709



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