[PATCH] D122994: [SVE] Move reg+reg gather/scatter addressing optimisations from lowering into DAG combine.
Paul Walker via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Apr 3 06:35:52 PDT 2022
paulwalker-arm created this revision.
Herald added subscribers: psnobl, hiraditya, tschuett.
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This is essentially a refactoring patch but allows more cases to
be caught, hence the output changes to some tests.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D122994
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-gather.ll
llvm/test/CodeGen/AArch64/sve-fixed-length-masked-scatter.ll
llvm/test/CodeGen/AArch64/sve-gather-scatter-addr-opts.ll
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