[PATCH] D122970: [LoongArch] Fix instruction definition
Lu Weining via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Apr 2 03:16:16 PDT 2022
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGcd85ea943157: [LoongArch] Fix instruction definition (authored by wangleiat, committed by SixWeining).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122970/new/
https://reviews.llvm.org/D122970
Files:
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/1ri.mir
Index: llvm/test/CodeGen/LoongArch/1ri.mir
===================================================================
--- llvm/test/CodeGen/LoongArch/1ri.mir
+++ llvm/test/CodeGen/LoongArch/1ri.mir
@@ -29,7 +29,7 @@
name: test_LU32I_D
body: |
bb.0:
- $r4 = LU32I_D 196
+ $r4 = LU32I_D $r4, 196
...
---
# CHECK-LABEL: test_PCADDI:
Index: llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
===================================================================
--- llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -330,7 +330,11 @@
def ADDU16I_D : ALU_2RI16<0b000100, "addu16i.d", simm16>;
def ALSL_WU : ALU_3RI2<0b000000000000011, "alsl.wu", uimm2_plus1>;
def ALSL_D : ALU_3RI2<0b000000000010110, "alsl.d", uimm2_plus1>;
-def LU32I_D : ALU_1RI20<0b0001011, "lu32i.d", simm20>;
+let Constraints = "$rd = $dst" in {
+def LU32I_D : Fmt1RI20<0b0001011, (outs GPR:$dst),
+ (ins GPR:$rd, simm20:$imm20),
+ "lu32i.d\t$rd, $imm20">;
+}
def LU52I_D : ALU_2RI12<0b0000001100, "lu52i.d", simm12>;
def PCADDU18I : ALU_1RI20<0b0001111, "pcaddu18i", simm20>;
def MUL_D : ALU_3R<0b00000000000111011, "mul.d">;
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