[PATCH] D122968: [AArch64][SelectionDAG] Add target-specific implementation of srem

[chenglin.bi via Phabricator via llvm-commits]

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1. X%C to the equivalent of X-X/C*C is not always fastest path if there is no SDIV pair exist. So check target have faster for srem only first.
2. Add AArch64 faster path for SREM only pow2 case

Fix https://github.com/llvm/llvm-project/issues/54649


https://reviews.llvm.org/D122968

Files:
  llvm/include/llvm/CodeGen/TargetLowering.h
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/srem-lkk.ll
  llvm/test/CodeGen/AArch64/srem-seteq.ll
  llvm/test/CodeGen/AArch64/srem-vector-lkk.ll

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