[PATCH] D122915: [AArch64] UBFM fold in the MIPeepholeOpt.

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added a comment.

In D122915#3424047 <https://reviews.llvm.org/D122915#3424047>, @benshi001 wrote:

> I would prefer AArch64 specific DAGCombine.



In D122915#3423539 <https://reviews.llvm.org/D122915#3423539>, @efriedma wrote:

> 2. Form the BFM op as a DAGCombine, instead of waiting for isel.

For now test case's selection DAG before instruction select is:

  t0: ch = EntryToken
  t2: i32,ch = CopyFromReg t0, Register:i32 %0
        t7: i32 = srl t2, Constant:i64<16>
      t9: i32 = and t7, Constant:i32<240>
      t4: i32 = and t2, Constant:i32<-241>
    t10: i32 = or t9, t4
  t12: ch,glue = CopyToReg t0, Register:i32 $w0, t10
  t13: ch = AArch64ISD::RET_FLAG t12, Register:i32 $w0, t12:1

Do you mean we add a new AArch64ISD like AArch64ISD::BFM, then form AArch64ISD::BFM in performOrCombine ?


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