[PATCH] D122501: [AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:788
+  for (auto Idx : ImpactedRegions) {
+    NewPressure[Idx] = Pressure[Idx];
+    NewLiveIns[Idx] = LiveIns[Idx];
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There can be a lot of regions, I'd better switch to a map indexed by Idx rather than live huge unused chunks of vectors.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:1000
+}
\ No newline at end of file

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Return the newline.


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Comment at: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp:739
 
     MachineInstr *UseI = &*MRI.use_instr_begin(Reg);
     if (Def->getParent() == UseI->getParent())
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vangthao wrote:
> rampitec wrote:
> > This also needs a nodbg use (use_nodbg_instructions).
> If there is a debug use before the first nondbg use, this will sink the MI after the debug use.
The point is: codegen with and without debug info shall not differ. With this code it will.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122501/new/

https://reviews.llvm.org/D122501