[llvm] 76cd11f - [DAG] Add llvm::isMinSignedConstant helper. NFC

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-04-01T17:47:34+01:00
New Revision: 76cd11f303062bf2e8cdcbe0b4ffbe5ceab7e240

URL: https://github.com/llvm/llvm-project/commit/76cd11f303062bf2e8cdcbe0b4ffbe5ceab7e240
DIFF: https://github.com/llvm/llvm-project/commit/76cd11f303062bf2e8cdcbe0b4ffbe5ceab7e240.diff

LOG: [DAG] Add llvm::isMinSignedConstant helper. NFC

Pulled out of D122754

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/lib/Target/X86/X86ISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
index f32d9eeaff6e4..6b2491358a3f0 100644
--- a/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
+++ b/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
@@ -1667,6 +1667,9 @@ bool isAllOnesConstant(SDValue V);
 /// Returns true if \p V is a constant integer one.
 bool isOneConstant(SDValue V);
 
+/// Returns true if \p V is a constant min signed integer value.
+bool isMinSignedConstant(SDValue V);
+
 /// Return the non-bitcasted source operand of \p V if it exists.
 /// If \p V is not a bitcasted value, it is returned as-is.
 SDValue peekThroughBitcasts(SDValue V);

diff  --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index f8bcf0b0851c0..8f3d5fcd5b044 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -10399,6 +10399,11 @@ bool llvm::isOneConstant(SDValue V) {
   return Const != nullptr && Const->isOne();
 }
 
+bool llvm::isMinSignedConstant(SDValue V) {
+  ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
+  return Const != nullptr && Const->isMinSignedValue();
+}
+
 SDValue llvm::peekThroughBitcasts(SDValue V) {
   while (V.getOpcode() == ISD::BITCAST)
     V = V.getOperand(0);

diff  --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index f7c365cc7f46a..a9fa64e488ee9 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2435,9 +2435,8 @@ bool X86DAGToDAGISel::matchAddressRecursively(SDValue N, X86ISelAddressMode &AM,
     // We want to look through a transform in InstCombine that
     // turns 'add' with min_signed_val into 'xor', so we can treat this 'xor'
     // exactly like an 'add'.
-    if (auto *NC1 = dyn_cast<ConstantSDNode>(N.getOperand(1)))
-      if (NC1->isMinSignedValue() && !matchAdd(N, AM, Depth))
-        return false;
+    if (isMinSignedConstant(N.getOperand(1)) && !matchAdd(N, AM, Depth))
+      return false;
     break;
 
   case ISD::AND: {