[PATCH] D122703: [AArch64][InstCombine] Fold MLOAD and zero extensions into MLOAD
Allen zhong via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 1 02:59:43 PDT 2022
Allen added a comment.
In D122703#3419784 <https://reviews.llvm.org/D122703#3419784>, @paulwalker-arm wrote:
> In D122703#3418244 <https://reviews.llvm.org/D122703#3418244>, @Allen wrote:
>
>> hi @paulwalker-arm
>>
>> With some debug with function DAGCombiner::visitAND, I find there is another issue need to check:
>>
>> 't s
>> it use **TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT, LoadVT)** to check whether the following transform can be done, do we need similar check in the AArch64 backend? If yes, I think we must set MVT::nxv2i32 legal.
>
> Not sure I understand what you mean here. `ExtVT` will be the legal type, most likely `MVT::nxv2i64`, whereas `MVT::nxv2i32` will be the MemVT that doesn't need to be legal, so I don't see an issue? Looking at `DAGCombiner::visitAND` it looks like it already does a related transformation but because it relies on `BuildVectorSDNode` is fails for scalable vectors. To me it looks like we can make this common code more portable and support all vector types.
I rewrite the MR with above review with support splat_vec in DAGCombiner::visitAND, thanks @paulwalker-arm very much for detail advice.
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https://reviews.llvm.org/D122703/new/
https://reviews.llvm.org/D122703
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