[PATCH] D122501: [AMDGPU] Enable PreRARematerialize scheduling pass with multiple high RP regions

Vang Thao via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 31 18:32:55 PDT 2022


vangthao updated this revision to Diff 419598.
vangthao marked 5 inline comments as done.
vangthao added a comment.

Fix formatting and comments.
Reduce required copies of cached Pressure and Liveins.
Update Pressure and Liveins for all regions where the reg is live-in when sinking.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122501/new/

https://reviews.llvm.org/D122501

Files:
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
  llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D122501.419598.patch
Type: text/x-patch
Size: 23850 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20220401/a5146cb9/attachment.bin>


More information about the llvm-commits mailing list