[PATCH] D122540: [X86] Fix handling of maskmovdqu in x32 differently
Harald van Dijk via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 31 18:12:20 PDT 2022
hvdijk marked an inline comment as done.
hvdijk added inline comments.
================
Comment at: llvm/lib/Target/X86/X86InstrSSE.td:4000
let ExeDomain = SSEPackedInt, SchedRW = [SchedWriteVecMoveLS.XMM.MR] in {
-let Uses = [EDI], Predicates = [HasAVX,Not64BitMode] in
+let Uses = [EDI], Predicates = [HasAVX], isAsmParserOnly = 1 in
def VMASKMOVDQU : VPDI<0xF7, MRMSrcReg, (outs),
----------------
skan wrote:
> Please add comments in the TD file about why you set this instruction `isAsmParserOnly`.
> (see example in X86InstrTSX.td)
Comment added, the wording is based on the comment that was originally there prior to D103427 and the error we get when we do not mark it `isAsmParserOnly`.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D122540/new/
https://reviews.llvm.org/D122540
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