Author: Matt Arsenault
Date: 2022-03-31T18:49:23-04:00
New Revision: f635be30144d890f866510425612fc26fa379de4
URL: https://github.com/llvm/llvm-project/commit/f635be30144d890f866510425612fc26fa379de4
DIFF: https://github.com/llvm/llvm-project/commit/f635be30144d890f866510425612fc26fa379de4.diff
LOG: X86/GlobalISel: Use LLT form of getMachineMemOperand
Added:
Modified:
llvm/lib/Target/X86/X86InstructionSelector.cpp
llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstructionSelector.cpp b/llvm/lib/Target/X86/X86InstructionSelector.cpp
index f4abb3a83c316..fb13d93dd1d44 100644
--- a/llvm/lib/Target/X86/X86InstructionSelector.cpp
+++ b/llvm/lib/Target/X86/X86InstructionSelector.cpp
@@ -516,7 +516,7 @@ bool X86InstructionSelector::selectLoadStoreOp(MachineInstr &I,
// is already on the instruction we're mutating, and thus we don't need to
// make any changes. So long as we select an opcode which is capable of
// loading or storing the appropriate size atomically, the rest of the
- // backend is required to respect the MMO state.
+ // backend is required to respect the MMO state.
if (!MemOp.isUnordered()) {
LLVM_DEBUG(dbgs() << "Atomic ordering not supported yet\n");
return false;
@@ -1412,7 +1412,7 @@ bool X86InstructionSelector::materializeFP(MachineInstr &I,
MachineMemOperand *MMO = MF.getMachineMemOperand(
MachinePointerInfo::getConstantPool(MF), MachineMemOperand::MOLoad,
- MF.getDataLayout().getPointerSize(), Alignment);
+ LLT::pointer(0, MF.getDataLayout().getPointerSizeInBits()), Alignment);
LoadInst =
addDirectMem(BuildMI(*I.getParent(), I, DbgLoc, TII.get(Opc), DstReg),
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir b/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
index 0a700979374ff..10f9cbdce73f2 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-fconstant.mir
@@ -35,7 +35,7 @@ body: |
; CHECK_NOPIC64-NEXT: RET 0, implicit $xmm0
; CHECK_LARGE64-LABEL: name: test_float
; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
- ; CHECK_LARGE64-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (s64) from constant-pool, align 4)
+ ; CHECK_LARGE64-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (p0) from constant-pool, align 4)
; CHECK_LARGE64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSSrm_alt]]
; CHECK_LARGE64-NEXT: $xmm0 = COPY [[COPY]]
; CHECK_LARGE64-NEXT: RET 0, implicit $xmm0
@@ -82,7 +82,7 @@ body: |
; CHECK_NOPIC64-NEXT: RET 0, implicit $xmm0
; CHECK_LARGE64-LABEL: name: test_double
; CHECK_LARGE64: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri %const.0
- ; CHECK_LARGE64-NEXT: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (s64) from constant-pool)
+ ; CHECK_LARGE64-NEXT: [[MOVSDrm_alt:%[0-9]+]]:fr64 = MOVSDrm_alt [[MOV64ri]], 1, $noreg, 0, $noreg :: (load (p0) from constant-pool)
; CHECK_LARGE64-NEXT: [[COPY:%[0-9]+]]:vr128 = COPY [[MOVSDrm_alt]]
; CHECK_LARGE64-NEXT: $xmm0 = COPY [[COPY]]
; CHECK_LARGE64-NEXT: RET 0, implicit $xmm0