[PATCH] D120958: [TableGen] Add support for variable length instruction in decoder generator

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu added a comment.

Also, please make sure all existing disassembler tests, especially targets that use FixedLenDecoder, are passing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120958/new/

https://reviews.llvm.org/D120958