[PATCH] D122803: [AMDGPU][GlobalISel] Scalarize add/sub with overflow ops in the legalizer

[Matt Arsenault via Phabricator via llvm-commits]

arsenm accepted this revision.
arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sadde.mir:53
+    ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ANYEXT]], [[C1]]
+    ; CHECK-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[ANYEXT1]], [[C1]]
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I'm a bit surprised we don't end up with s32 = G_ZEXT s1. Do we have an optimization that puts this back together?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D122803/new/

https://reviews.llvm.org/D122803