[PATCH] D122540: [X86] Fix handling of maskmovdqu in x32 differently

[Kan Shengchen via Phabricator via llvm-commits]

skan added inline comments.


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Comment at: llvm/lib/Target/X86/X86InstrSSE.td:4000
 let ExeDomain = SSEPackedInt, SchedRW = [SchedWriteVecMoveLS.XMM.MR] in {
-let Uses = [EDI], Predicates = [HasAVX,Not64BitMode] in
+let Uses = [EDI], Predicates = [HasAVX], isAsmParserOnly = 1 in
 def VMASKMOVDQU : VPDI<0xF7, MRMSrcReg, (outs),
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Please add comments in the TD file about why you set this instruction `isAsmParserOnly`.
(see example in X86InstrTSX.td)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D122540/new/

https://reviews.llvm.org/D122540